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| www.fairchildsemi.com FSDH565 Fairchild Power Switch(FPS) Features * * * * * * * * * * Single Chip 650V 0.5A SenseFET Power Switch Precision Fixed Operating Frequency (100kHz) Internal Start up Switch UVLO with Hysteresis (6.7V/8.7V) Over Load Protection Over Current Protection (0.3A) Internal Thermal Shutdown Function Secondary Side Regulation Auto-restart mode No load consumption <250mW at 265VAC input Description The FSDH565 is specially designed for an off-line SMPS with minimal external components. The FSDH565 is a monolithic high voltage power switching regulator that combine the SenseFET(LDMOS) with voltage mode PWM control block. Included PWM controller features integrated fixed oscillator, under voltage lock out, leading edge blanking, optimized gate turn-on/turn-off driver, thermal shut down protection and temperature compensated precision current sources for loop compensation and fault protection circuitry. compared to discrete MOSFET and controller or RCC switching converter solution, a FSDH565 can reduce total component count, design size, weight and at the same time increase efficiency, productivity, and system reliability. It has a basic platform well suited for cost effective design in a flyback converter. 8-DIPH Applications * Charger & Adaptor for Mobile Phone, PDA & MP3 * Auxiliary Power for PC, C-TV, Monitor 1 1.Vstr 2.Vfb 3.4.5.6.GND 7.Vcc 8.Drain Internal Block Diagram #1 : Vstr UVLO 6.7V #7 : Vcc UVLO VREG(5.8V) 4.5V VREF UVLO 8.7V INTERNAL BIAS #8 : Drain SFET OSC S Q PWM 0.45 mA + R L.E.B 5.8V 5 uA #2 : Vfb OLP + _ 4.5V OCP S Q R TSD /4 (c)2001 Fairchild Semiconductor Corporation + _ Vth _ _ _ #3,#4,#5,#6 GND Rev.1.0.2 FSDH565 Absolute Maximum Ratings (Ta=25C unless otherwise specified) Parameter Maximum Drain Voltage Continuous Drain Current (TC=25C) Maximum Supply Voltage Input Voltage Range Operating Ambient Temperature Storage Temperature Range Symbol VD,MAX ID VCC,MAX VFB TA TSTG Value 650 0.3 21 -0.3 to VSD -25 to +85 -55 to +150 Unit V ADC V V C C PIN Definitions Pin Number 1 Pin Name Vstr Pin Function Description This pin connects directly to the rectified AC line voltage source. At start up the internal switch supplies internal bias and charges an external capacitor that connects from the Vcc pin to ground. once this reaches 8.7V, Vstr is isolated internally. This pin is the inverting input of the PWM comparator, and it operates normally between 0.5V and 2.5V. It has a 0.45mA current source connected internally and a capacitor and opto coupler connected externally. A feedback voltage of 3.5V to 4.5V triggers overload protection (OLP). There is a time delay due to the 5uA current source, which prevents false triggering under transient conditions but still allows the protection mechanism to operate under true overload conditions. These pins are the control ground and the SenseFET Source. This is the positive supply voltage input. During start up, power is supplied to this input from Pin 1. When Vcc reaches the UVLO upper threshold (8.7V), the start up Internal Switch (Vstr) turns off and power is supplied from auxiliary transformer winding. This pin is designed to directly drive the converter transformer and is capable of switching a maximum of 650V and 1A. 2 Vfb 3, 4, 5, 6 7 GND Vcc 8 Drain 2 FSDH565 Electrical Characteristics (Ta=25C unless otherwise specified) Parameter SENSEFET SECTION Drain-Source Breakdown Voltage Zero gate voltage drain current Static drain-source on Resistance Rise Time Fall Time START UP SECTION VSTR Supply Voltage UVLO SECTION Start Threshold Voltage Stop Threshold Voltage OSCILLATOR SECTION Initial accuracy Maximum Duty Cycle Minimum Duty Cycle FEEDBACK SECTION Feedback Source Current Shutdown feedback Voltage Peak Current Limit PROTECTION SECTION Thermal Shutdown Temperature (Tj) (1) TOTAL DEVICE SECTION Operating Supply Current IOP VCC = 9.5V (Max) 3.5 mA TSD 125 145 C IFB VSD IOVER Vfb = 0V peak inductor current 0.40 4.0 0.25 0.45 4.5 0.3 0.50 5.0 0.35 mA V A FOSC DMAX DMIN Tj = 25C Vfb = 3V Vfb = 0V 90 64 100 67 0 110 70 0 kHz % % Vstart Vstop After turn on 8.0 6.0 8.7 6.7 9.4 7.4 V V VST 17 V BVDSS IDSS RDS(ON) TR TF VGS = 0V, ID = 100A VDS = 520V ID = 50mA Tj = 25C ID = 50mA Tj = 100C VDS = 325V, ID = 300mA VDS = 325V, lD = 50mA 650 36 51 100 50 100 39 59 V A nS nS Symbol Condition Min. Typ. Max. Unit CURRENT LIMIT(SELF-PROTECTION)SECTION Note: 1. These parameters, although guaranteed, are not 100% tested in production 3 FSDH565 Typical Performance Characteristics (These characteristic graphs are normalized at Ta=25C) BVdss[V] 800 790 780 770 760 750 740 730 720 710 700 -25 0 25 BVdss Idss[nA] 5000 4500 4000 3500 3000 2500 2000 1500 1000 500 0 Idss 50 75 100 125 -25 0 25 50 75 100 125 Temperature[] Temperature[] Figure 1. Breakdown vs.Temperature Figure 2. Zero gate voltage drain current vs.Temperature Vstart[V] 8.8 Vstart Vstop[V] 6.8 Vstop 8.7 6.75 8.6 6.7 6.65 8.5 6.6 8.4 6.55 8.3 -25 0 25 50 75 100 125 6.5 -25 0 25 50 75 100 125 Temperature[] Temperature[] Figure 3. Start Threshold Voltage Iop Figure 4. Stop Threshold Voltage Vstr Iop[mA] 2.55 Vstr[V] 22 2.5 21 20 2.45 19 2.4 18 2.35 17 2.3 16 15 2.25 -25 0 25 50 75 100 125 -25 0 25 50 75 100 125 Temperature[] Temperature[] Figure 5.Operating Supply Current Figure 6.Vstr Supply Voltage 4 FSDH565 Typical Performance Characteristics (Continued) (These characteristic graphs are normalized at Ta=25C) Frequency[Khz] 110 OSC Ibias[uA] 460 Ifb IBias 450 105 440 100 430 95 420 90 -25 0 25 50 75 100 125 410 -25 0 25 50 75 100 125 Temperature[] Temperature[] Figure 7. Output Frequency IPeak Figure 8. Feedback Source Current IPeak(A) 0.31 0.3 0.29 0.28 0.27 0.26 0.25 -25 0 25 50 75 100 125 Temperature[] Figure 9. Peak Current Limit 5 FSDH565 Typical Circuit VDC Vstart 1 Start-up 8 Drain PWM 3,4,5&6 Feedback Circuit BCDMOS 1Chip 2 Vfb 7 Vcc GND 6 FSDH565 Package Dimensions 8-DIPH 7 FSDH565 Ordering Information Product Number FSDH565 Package 8-DIPH Rating 650V, 0.5A Topr (C) -25C to +85C DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. www.fairchildsemi.com 10/17/01 0.0m 001 Stock#DSxxxxxxxx 2001 Fairchild Semiconductor Corporation 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. |
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